The complexity of manufacturing photolithography has increased significantly. The increase in the level of integration has driven smaller feature-sized integrated circuits (ICs). The evolution in stepper technologies has been geometric. This has enabled the printing of printed ICs with a 45 nm feature size. Improvement in lithographic technology is moving towards 32 nm. This feature-size roadmap poses many challenges to semiconductor manufacturing technology. Advanced photomask synthesis, high-NA steppers, and computational lithography are some examples of the solution space. Optical proximity correction (OPC) and model-based optical proximity correction (MBOPC) are subsets of this solution space. OPC has matured significantly and is the de facto solution for manufacturing photomasks up to the 65 nm node. The OPC technique has been further refined as model-based OPC and has been applied to advanced printing technology of 45 nm. The OPC solution for 45 nm technology has limitations of mask rule check (MRC) and manufacturability restrictions. These restrictions are inevitable in OPC and MBOPC solutions because of the limits in lithographic technology. The technology evolution towards 32 nm has equally challenged the non-linear treatment of wafer-level problems in OPC solutions. PBOPC has limitations in reducing the wafer optical proximity error of the granny's issue, edge placement, mask rule check, etc. PBOPC also has limitations in reducing the mask error enhancement factor. With all these challenges, it is still a formidable solution methodology to address the wafer and mask level issues. Such a formidable solution architecture can result in a limited number of PBOPC solutions. This text looks at the performance of advanced PBOPC features on exposure tuning and the effects of higher-order wafer and aerial image effects. This text also discusses the performance of continuous process correction of masks, lenses, and scanners.

Given the critical role of optical proximity correction in computational lithography, it is important that pattern fidelity is preserved and that edge placement errors are minimized in the optical lithography process. As semiconductor manufacturing technology proceeds to smaller feature sizes, optical proximity correction has evolved into a highly sophisticated and critical step in the elaborate process of mask data preparation. Another significant issue that emerged with the evolution of various light sources and resolution enhancement techniques is the complexity of the lithography process, especially in terms of correction efforts. For negative photoresist contrast, correcting the mask with a low contrast/light-shielding pattern is also a challenge due to a large process window such as the best focus range and the depth of focus. However, for lithographic processes, it may sometimes occur that pattern fidelity can be maintained away from the best focus range. In such cases, systematic edge placement errors appear on the critical dimension as a function of defocus [1].

Therefore, optical proximity correction methods with long critical dimension adjustments are less sensitive to quick edge placement errors and can be very efficient in very high-volume manufacturing at or near the planar wafer while affecting only intra-field critical dimension uniformity in some limited areas and not creating hot spots. In dense array changes, optical proximity correction methods do not affect single-chain existing feature dimensions while preserving array compatibility. Advanced optical proximity correction methods also allow for aggressive improvements in the sharpness of the structure in hot rings and a further reduction in overlay critical dimension and edge placement error impact in areas of smaller overlay bands. The interaction between the features of interest and the features of no interest in these additional small regions has been successfully addressed. We also show improvements in the model to lithography results and optical proximity correction convergence results for an optical proximity correction methodology using an integrated scattering bars approach and care areas over the standard method. Detectability of the hot ring region and care area inclusion are examined with a process window analysis [2].

Figure 1

Optical Proximity Correction (OPC) Under Immersion Lithography

1.1. Background and Significance of OPC in Computational Lithography

Optical proximity correction (OPC) has become a fundamental component of the field of computational lithography. Over the past 25 years, it has played a key role in improving the printability of the target patterns and has been instrumental in enhancing pattern fidelity and edge placement accuracy. OPC technologies are expected to address the fundamental manufacturing issues of sub-10 nm technologies, which require multi-patterning lithography techniques to manufacture gate-level patterns [3]. OPC methodologies have evolved over the years and are continuing to do so to adapt to the changes in manufacturing needs. OPC solutions developed during the era of rule-based methodologies, data-centric OPC, and model-based OPC are all designed based on the same principles. However, they are solved with varying levels of detail and capabilities at each era and serve the specific requirements and needs. As the manufacturing needs improved, the OPC methodologies have developed from rule-based solutions to data-centric methods and to model-based OPC solutions. The print behavior of the target input patterns in electron-beam lithography, X-ray lithography, resistive e-beam maskless lithography, a mix of DSA-EUV lithography processes, and corresponding phase shift masks has gained importance, with improved manufacturability. The breakthroughs of resolution enhancement techniques and correction in OPC have led to rapid advancements in CMOS technology. OPC has played a significant role in the field of computational lithography. Throughput and mask-manufacturing repair technology requirements are significantly reduced in computational lithography compared to the mask specialist correction method. Thus, traditional OPC technology has reached a remarkable milestone in terms of good pattern fidelity and edge placement error over the last two decades [4].

Equation 1: Aerial Image Intensity Distribution

where:

$I\left(x,y\right)$ = Aerial image intensity at position $\left(x,y\right)$

${ℱ}^{-1}$ = Inverse Fourier transform

$P\left(u,v\right)$ = Mask pattern in frequency domain

$H\left(u,v\right)$= Optical system transfer function

Fundamentals of Optical Proximity Correction (OPC) One of the key principles underlying the advancements of OPC techniques is what is known as resolution enhancement. The primary purpose of the resolution enhancement was to make the printed representations as close to the ideal mask data on the design plane, free of any optical aberrations. However, as we know, lithography, which is the best-studied optical microscopy theory, is the phenomenon of diffraction of waves. This happens when structures are patterned onto a finely polished silicon wafer. Optical proximity correction essentially addresses the printing distortions induced by the diffractions during lithography by simulating the process of lithography using mathematical models and making suitable changes to the polygons of the mask data to achieve the desired lithographic patterns envisioned during IC design onto the silicon surface. The goal of OPC is to compensate for the influence of process variation on the mask, which is directly proportional to the feature size of the structures being patterned onto the wafers. OPC allows us to fabricate more complex, more efficient, and higher-performance VLSI products with a die of small size to achieve better vertical integration. The design of the optimal OPC solution primarily is a modeling problem and can be approached from a purely mathematical and simulation standpoint. OPC can be conveniently divided into two categories: the optical proximity correction OPC, where optical resolving of the features or dimensions tends to be affected by the masks or the structures being patterned, and the electron beam lithography proximity correction-based OPC, which is a result of the charging of the wafers when the structures are grown into silicon or on the silicon substrate plane. OPC is tailored according to the lithographic techniques being used for photolithography, electron beam lithography, X-ray, and UV lithography. Different OPC techniques are used under different lithotype constraints. Therefore, OPC has to be adopted according to the type of lithography we are using or by the characteristics of the lithography [5].

2.1. Basic Principles and Objectives of OPC

For a long time, the predominant goal of computational lithography has been to accommodate the impact of optical printing imperfections with defective images on the silicon wafers. Today, commercial and experimental lithography machines achieve unimagined resolution by utilizing complicated optical components that allow the creation of images of extremely demanding patterns. However, those benefits usually come with a price - lithographic resolution is susceptible to various aberrations, due to which the light diffracts and patterns projected on the photoresist material - a photo-sensitive layer applied to the surface of the silicon wafers - may suffer from local distortions or misplacements [6]. OPC methods attempt to perform the so-called 'dose modulation' and compensate for such distortions by adding 'geometric biases' or features to the layout. In simplest terms, 'dark' areas - where more light is supposed to print on the wafer - are implanted with additional sub-resolution assist features that enhance the accordance between the retrieved and original pattern.

Sadly, such straightforward conventional OPC techniques have become redundant today, as the splitting of the optical correction objective into two individual goals, called 'compensation on demand' and mask rule compliance, ensures that the pattern fidelity goals are met while simultaneously the increased rule density is consistent with an increase in the complexity of the mask rule set [7]. The ultimate goal of OPC correction is to achieve high edge quality and pattern placement, to achieve maximum image contrast, high fidelity to design rules, and robust process window characteristics. Three main OPC models can be applied based on candidate features: final OPC, which uses a complex set of potential OPC correction features; resist-shaped OPC, where candidate extra correction shapes are defined at the resist level; and fragmentation OPC, which uses a set of geometrically defined correction shapes. These three methods are evaluated using different simulated tests on exposure from true-device layouts, and based on model results we also assess the impact on metrology of OPC corrections on final-pattern fidelity, and the possible impact on OPC performance based on deviations between hierarchical and flat simulations [8].

The semiconductor manufacturing industry has continually strived to achieve pattern accuracy in the design layout with which silicon is patterned to affect the functional operation of the devices. Advancements in optical exposure tools and litho-film materials have further challenged the litho community. The existing trend towards the extension of 193nm immersion technology for over a decade has decreased the reliance on exposure tools' capability to continue dimensional scaling into finer features below its resolution, which further enables the ability to continue device downscaling. Typically, manufactured patterns deviate from edge locations on a hard mask or functional stack encountered during material depositions and etch. This phenomenon is commonly known as the optical proximity effect [9].

The litho processing is further accompanied by many design-compaction rules being deliberately relaxed for process-friendly layouts. The final injection of errors is due to material properties that would lead to the unintended formation of patterns through etches and CMP, which starts impacting the interaction with the performing device in an electromagnetic way. Traditional resolution enhancement strategies address the use of sub-resolution assist features and optical proximity correction techniques that have served the industry effectively for several generations. Continuing this trend, increasing feature densities and shrinking k1-factor result in deviated edge areas on the pitch dimension called intra-region or inter-field/scattered dots called inter-region outside a nominal fidelity on on-edge/straight-line edges. In general, maintaining pattern fidelity has turned out to be very challenging with ever-increasing aspect ratios of patterns and for structures having taller spires than dog bones or inflection point-like structures. Advancements in resist process techniques and accompanying compact physical models aid in the construction of a well-fitted image to silicon/process and support the decent representation of mask design that in the end converts to lithographic prints. Therefore, process models and litho prints may not reflect an actual programmed design [10].

The material, design, process, and tool-induced intra-die process variations interfere intensively with performance and yield. Printing, also known as scanner-predicted optical proximity effects, needs to be revised with a holistic understanding and reactions between appearance at etch and overall device performance. Erroneous design carry-forward or learning and training in optical proximity correction modeling sets result in persistent signature errors. Inputs of advancements in optical proximity correction modeling and the lack of them push patterning nodes into the tail area with a significant probability of misregistered features and declines in transistor speed, capacitance mismatch, and high-process layer parametric changes leading to low product performance and yield. Conditions in the low-k1 regime have necessitated this paper to discuss advanced optical proximity correction techniques in the computational lithography domain that help achieve pattern fidelity in both on-edge line/space and corner/ellipse/convex patterns of leading-edge technology nodes [10].

Figure 2

Edge Placement Error (EPE) histograms at nominal and out of focus

3.1. Causes and Impact of Pattern Fidelity Issues

Causes for Pattern Fidelity Issues: Diffraction of Electromagnetic Waves. A key physical process that challenges the perfect printing of the aerial image of a pattern into photoresist is diffraction, the bending of the electromagnetic wavefront around the edges of the mask, resulting in the presence of so-called sidelobes around lithographically printed features. Interference: The interference of the bent wavefront from adjacent mask edges, also contributing to sidelobe formation, increases as the pitch of adjacent features decreases. Material and Environmental Changes: The refractive index and extinction coefficient of photoresist are related to its chemistry as well as associated processing parameters. Process fluctuations such as variations in the delays in the exposure or the development can cause localized variations in the feature shapes across the chip, known as focus exposure matrix signatures. Impact on Yield and Device Reliability: At advanced technology nodes, it becomes increasingly clear that deviations from the desired two-dimensional device layouts due to lack of pattern fidelity can no longer be ignored. There are several examples of devices for which pattern fidelity has driven the design towards simpler patterns or significant redesign in the past [11].

In an unfortunate (and costly) case, a defect in the print of similarly dense contacts in two different critical layers of a production flow drove chip makers to add experimental resolution-enhancement techniques to the vicinity of one type of contacts in just one of the layers to try to stabilize their lithographic printing. The presence of the pattern fidelity issue explains why only one of the two device patterns was equipped with the experimental resolution enhancement. Pattern fidelity is instrumental for device manufacturers to meet their design specifications while utilizing the full lithographic resolution capability of the photolithography tools, which is critical to maximize cost efficiency. Advanced OPC Techniques Needed to Address the Problem: Given the pervasiveness of the causes leading to pattern fidelity issues, it becomes increasingly impractical to look for fabrication solutions that would correct every one of them effectively [12]. As a result, we argue that modeling and addressing pattern fidelity considerations during the design for the manufacturing stage are necessary for the successful development and manufacturing at the advanced technology nodes. In this work, we present a repertoire of advanced optical proximity correction techniques to enhance pattern fidelity and thereby mitigate edge placement error [13].

OPC refers to a set of techniques that have been used in the semiconductor manufacturing industry since the mid-1980s to compensate for the non-idealities of optical lithography, such as diffraction and photoresist characteristics. The OPC process can be rule-based or model-based. Rule-based OPC uses the knowledge of layout geometries and designs to define and apply correction rules at different locations across the chip. Although most lithographers agree that optical lithography has been around for decades and that many practices used in lithography today are fundamentally the same as they were over 20 years ago, there are significant differences between today’s lithography and that of the past. In the last two decades, lithographic resolution capability has improved significantly. In the mid-1980s, a 1.0 mm design rule resolution was possible, and today, 193 nm wavelength lithography offers 40-60 nm resolution with a 0.23 mA lithography k1 factor. This jump from 1 mm to sub-100 nm resolution has introduced new fidelity problems in lithography, especially concerning hard-to-correct edge placement errors [14].

With the evolution of rule-based OPC, many techniques have been explored and developed. Although some of these techniques can handle some of the challenging aspects of OPC, such as non-linear OPC and complex feature orientation, these techniques typically may not work very well with very complicated patterns that incorporate very small features of high curvature. Such patterns are commonly observed on memory and logic semiconductor critical layers. As a result, researchers in the lithography community are beginning to acknowledge that traditional OPC techniques have their limitations and that new revolutionary technologies will be needed if we are to go below 30 nm half-pitch and achieve an optical resolution capability of 11 nm and beyond. This paper will show some comparative OPC results that exhibit lithographic proximity correction technique developments over time [15].

4.1. Rule-Based OPC

The recipe to perform rule-based OPC is conceptually more straightforward. Starting at one edge of predefined features, the process of identifying those edges has been developed. This is done using low-level shape analysis or adapted graph-theoretical methods that assure the correct chain of corners to extract x, y, theta, and K values for the edge. These analytic kernels define how straight two edges can be placed to comply with certain image quality conditions. This low-level analysis identifies geometric feature types, such as gates, contacts, vias, or metal wiring structures. Accordingly, the propagation of printing and layout rule violations follows a set of basic rules. Some commonly applied commercial DRC/decomposition and correction tools are grouped into 'concentric features,' and 'linear OPC rules.' Fast, analytics-based corrections are executed in the examples of rule OPC. Atomic process flow steps have been described to meet the manufacturability specifications. Several correction mechanisms for image and layout constraints help achieve pattern fidelity and reduce Edge Placement Error [16].

The effect of lithographic corrections depends on the feature size and structure. The classification and the correction targets are dependent on the feature size; for example, line-end correction in a rule set for small features can enhance the pattern, and the process does not take too much time, given the few structures of this kind in the design pattern. The number of layout parts is manageable if the classification process is made to consider one parameter at a time. Accurate modeling of an under-sampled optical system is performed to extract the modified feature contours. The treatment of the data often depends on the complexity of the classifier. An OPC rule set designed for more complex structures might get confused if based on a single measured metric for domains with different lithographic behavior. Some systems have OPC capabilities to handle scatter bars as sub-resolution assist structures. The optical technique needs to be flexible to create a wide variety of features, but options are limited. Some patterns of features can be combined in a single OPC class. For example, the hole in the single-line OPCC could also be decomposed as an example of increased control.

Traditional OPC methods are limited in their ability to address pattern fidelity and edge placement error (EPE) due to the growing proximity effects and the use of complex optical and process parameters in modern lithography. This motivated the industry's development of model-based OPC methodology in the late 1990s. Modern model-based OPC techniques, including various flavors of optical, process, and mask entropy optimization, do not rely on a limited set of rules and are more adaptable to meeting the requirements of various design styles, process nodes, and patterning configurations. Differing only in the cost function used for aerial image multi-objective optimization, these techniques are similar in terms of optimization engine capabilities and semiconductor manufacturing requirements [17].

These advanced OPC techniques depend crucially on the availability of computational resources and simulation accuracy. In comparison with the extensive computational resources, long runtime, and exponential growth of writing time required for the advanced OPC techniques, the traditional 'hard' constraints of OPC usually required meager computational resources and had a more predictable scaling of writing time, even though the runtime was as long as a few hours. Therefore, the constraints of OPC often have to be relaxed to allow for reasonable runtimes and writing times, even if the resulting mask pattern might not be pattern fidelity. Despite this, the impact of extending the rules case OPC to relax these constraints and approaching the advanced full-chip models OPC solutions remains largely unexplored.

It compares the different approaches to address pattern fidelity and EPE through OPC. It illustrates the relative strengths and weaknesses of the rule-based OPC solutions compared to lithographic modeling-based OPC solutions. With technology development, the percentage of transistors corrected by OPC systems has increased from 10% to 20% of the chip area to almost 100% [18].

Figure 3

Optical proximity correction technique for enhancing

5.1. Model-Based OPC

One of the most significant advancements in OPC is the advancement from rule-based to model-based techniques. Rather than approximate the optical system with rules and hand-tuned parameter sets, model-based OPC uses complex algorithms and simulations to model the optical system at a fundamental level. Using mathematical models to describe the wave physics underlying the formation of the resist profile, these OPC algorithms can more accurately predict the optical printability of a pattern. This can be particularly important in illuminations created by multiple illumination sources, which exhibit complex phase-spreading effects at the edges of feature boundaries that are difficult to predict using simple heuristic rules. Because the light exposure of every feature in the pattern is simulated individually in a model-based OPC algorithm, tapering must be considered and corrected at every part of the feature's geometry, which greatly increases the dataset size and time to solution. Despite this drawback, model-based OPC algorithms can generate significantly more accurate correction solutions compared to their rule-based counterparts because of their more accurate predictive models, and they have come to dominate the OPC market in standard practice today.

One of the main advantages of model-based OPC techniques is that their detailed optical models allow for accuracy at the feature's edge and within complex geometries. The increased pattern correction accuracy is not just due to the illumination scope but primarily due to the increased accuracy of the printability prediction in the optical models, which is the basis for the model-based correction. The better the accuracy of the prediction, typically the better the correction solution. Although model-based OPC algorithms can accurately simulate optical effects, obtaining a sufficiently precise correction for a complex pattern can still be quite challenging, as they demand a large amount of optical reading data and must be thoroughly calibrated to actual optical characteristics in the lithography process. With complete calibration and attention during setup, however, model-based OPC techniques can significantly outperform rule-based solutions, both in fidelity and the versatility of features that can be patterned. Thus, it is typically considered time well spent to configure a model-based OPC algorithm thoroughly, to gain the necessary predictive accuracy required for lithographic detail. As a result, in the latest OPC requirements, the requirement has been added to utilize model-based techniques to solve critical patterns in actual devices. This component has repeatedly demonstrated improvements in final pattern fidelity and has shown enough of a return on investment to be added as a standard practice requirement [19].

Machine learning and artificial intelligence (AI) are exceptional technologies. Benefiting from their capability to analyze megabytes of data, they will be very important in the improvement of optical proximity correction (OPC) techniques. The biggest advantage of these techniques can be determined by the use of data-driven models. Traditional OPC techniques simply look for optical proximity correction by solving the numerical aperture and wavelength of the incoming light, the object with the light, and if there are high values such as defocus, the model-based correction is observed to optimize the additional correction as a function of the process. The values found in optical proximity correction depend on hard assumptions such as the validity of the model and the process information used, and the final precision is very much related to the durability of the apparatus. However, machine learning algorithms can use new OPC correction values by analyzing large data sets; they can obtain very fine patterns from these values and direct the process to get the corrected structure they want. For example, in nano-imprint lithography, a photomask effect can be decreased from the produced wafers retroactively by using an algorithm that a carefully manufactured mask-optimization engine cannot resolve before starting the process [20].

The use of AI in laboratory processes is also on the agenda. Optical scattering lithography systems, which seem to be transformed into computers quickly, are still going through the crucial classical question in speed and performance processes. So, even if the student or scientist who started a pattern optimization study feels very ambitious, it is unlikely to look at the results before the end of the season. Likewise, there is a chance that the graduate student who integrated deep learning into optical scanning microscopes can stop learning and take the PhD thesis down without achieving any further results since one is already satisfied. It can be said that in the use of such expensive equipment, machine learning gives very concrete work efficiency. To sum up, the data-based pattern infidelity or edge placement error correction techniques that have been seen so far largely remain theoretical, and it is important to ensure that all laboratory and pilot production steps work on scientific and practical problems in practice. The very fast data analysis output allows real-time control of the system thanks to AI, and it is seen that machine learning results are primarily applicable to determine the number of OPC samples closer to the best that can be used in the system after OPC. In this part of the paper, the application areas of machine learning and AI in OPC are provided. In addition to describing the potential applications, this section outlines the integration of machine learning technologies with the OPC process and provides the possible areas where machine learning and AI can be applied in OPC. The integration of machine learning technologies with OPC is expected to resolve many problems. Some of them may be briefly explained as summarized [21].

6.1. Applications and Benefits in Computational Lithography

Machine learning and AI techniques have been used in several computational lithography applications, particularly in optical proximity correction workflows. While many of these projects are proprietary and are not published, a few public and published examples exist. For e-beam lithography, a case study has quantified an OPC improvement in pattern fidelity associated with a large potential gain in production yield of between 5% to 8% across an advanced technology insert in a semiconductor manufacturing process. Moreover, in a second practical application of machine learning during OPC, a commercial infrared photomask defect classification solution was developed, quantifying a classification accuracy of greater than 93% across all defect categories. While very different, both of these applications demonstrated the potential of machine learning to resolve complex OPC design challenges that are best left to automated computational solutions, rather than manual painting of corrections. Importantly for OPC, machine learning-based pattern and edge placement error correction projects quantified the potential to address complex mask pattern fidelity challenges in a sub-10 nm design flow. In the future, machine learning applications in computational lithography may have further potential to develop adaptive techniques that can improve process window correction by learning from multiple process windows across different design structures to correct a design better than using an individual process per design. The potential for machine learning to use new incoming experimental data to evolve the quality of a correction where it is not possible for conventional techniques in a sign-off context is a strong argument for continued research in this area. Machine learning techniques offer a degree of scalability as new data can be added to build up training databases and improve correction accuracy over time. Consequently, the capacity for computational lithography correction-based machine learning techniques to improve is highly scalable. A production site could benefit from future correction techniques that provide lower turnaround times and optimized allocation of lithography resources to print a given design to specification. Consequently, the community is active in researching techniques at the cutting edge of correction-based computational lithography. As a general observation, it is widely perceived that machine learning techniques have the potential to transform the field of semiconductor OPC correction in the future [22].

Equation 2: Edge Placement Error (EPE)

where:

$EPE$ = Edge placement error

$X_{\text{printed}}$ = Printed feature edge position

$X_{\text{target}}$ = Desired feature edge position

Trends in Advantages:

There is an emerging trend in specifying optical proximity correction features of semiconductor design and optical proximity correction research. There is an increasingly large amount of data available to many of the top manufacturers, enabling the latest manufacturing processes and machines to be compared and evaluated with a level of precision seldom found in the research literature until recently. This is in stark contrast to 10 years ago when many of the modeling papers relied on technology from the very late 1990s using outdated and publicly available equipment parameters [23].

Powerful computational hardware has become very inexpensive and advanced software is readily available to researchers for evaluating novel algorithms and poses for addressing limitations in existing literature. There has also been a rapid growth in the number of researchers developing suitable numerical recipes for characterizing new phenomena and enabling the next generation of researchers to validate their work more rigorously because of this growth. The advent of nanotechnology, leader etching, and the use of directed chemicals in the manufacture of integrated circuits has effectively replaced the field of OPC with modules for addressing the challenge of pattern fidelity and edge placement error.

The electronic chip industry is rapidly following in the footsteps of both the hard-drive industry and the low-end manufacturers of semiconductors. Chips are becoming increasingly complicated to produce and fabricate. Design rules are being relaxed even further, enabling the chip designer to be given what he or she wants and not solely what can be manufactured. The purpose of identifying these trends is to show that the burgeoning technologies and pressures on the semiconductor industry driving the OPC industry can also be of great value to the software industry. In this work, we both document and seek to enumerate and specify a set of rational trends. This is to ensure that the same two communities collaborate in a manner that may facilitate the next generation of OPC research [24].

Figure 4

Optical Proximity Correction (OPC)

7.1. Nanotechnology and OPC

On the frontiers of advanced technology, nanotechnology informs and shapes advances in optical proximity correction (OPC) and vice versa. Why should this be so? The semiconductor manufacturing process, featuring half-pitch devices the size of nanometers, is simultaneously a challenge and an opportunity for the lithography patterning of pattern fidelity. Developments in nanomaterials allow new processes for fidelity to be developed. Also, using OPC ensures that these lithographic processes are accurate; indeed, OPC is perhaps the only way to tame the wild lithography of nano-feature patterning [25].

Features of the nanoworld: As features in circuits shrink to the nanoscale, new challenges emerge. The contours of a feature edge become rougher, less predictable, and more susceptible to perturbation by the local environment; this is known as edge placement error (EPE). While in the era of long-standing lithography, critical dimensions (CDs) have been the blindly obvious errors for which OPC is the solution, the EPE error is the other face of the same coin – roughness. These new features of the nanoworld are attracting the attention of several prominent researchers in the lithography community. Nanotechnology carries visions of devices and patterns growing out of a seamless blend between top-down and bottom-up methodologies. There is a natural place for OPC in nanotechnology, in the realm of top-down lithography, where semiconductor manufacturing is concerned with the lithography of ultra-small features. Naturally, the investment in OPC research over decades and the workflows and methodologies that have been established for this area will seep into the lithography of nanotechnology for the same reasons it emerged in OPC – to satisfy pattern fidelity while achieving cost savings. And, OPC offers the same potential for lithographic process integration perfection as is demonstrated in current semiconductor manufacturing. A proof-of-concept OPC-based lithography top-off has been recently demonstrated quite successfully in constructing 20-nm gold dimer pairs in the path of a focused X-ray [26].

Computer-generated models have been in use for over 30 years but are currently gaining new attention because their predictions are now accurate within only a few percent and are now being employed to predict surface profiles. Because of recent advances in computational speed, photolithographic models and their local image slope or curvature derivatives are now used to predict wafer-printed profiles for 2D and 3D structures. When compared to the contours from the wafer of the final developed photoresist profile, models of the image slope are accurate within the measurement tool uncertainty in the exposure defocus space of the wafer. High-quality photoresist predictions have been a key technology enabler because photoresist images are used to determine the accuracy of a photolitho model, which in turn predicts circuit linewidth, overlay, and depth of focus for a specific lithography etch set [27].

In this paper, we give a broad overview of OPC performance concerning three recent computer-generated photoresist or etched wafer prints. Each case study demonstrates a particular OPC methodology that has been applied to solve complex non-optimal OPC form-to-design problems that could only be implemented using computerized methods. When optimum model OPC has been obtained, only minimal manual editing is subsequently required to obtain the process direct or manufacturable OPC print. The case study applications of this technology have been used in three fields—namely, direct write computation, NGL flash masks, and argon fluoride lithography. The case studies demonstrate how modern management, engineering, and technical professionals have used solution teams to set and solve impressive dimensions, planarization, and OPC application challenges. While the application of the team and process direct technique has shown potential and some significant improvement in chip yield, the results are not reported herein. We focus on OPC improvements and present OPC results as increased adherence to the desired design printable geometries, a decrease in line end shortening, and model versus printed wafer OPC profile. For each application, we briefly detail the status of the planarization application and then describe how 3D or 2D print OPC has changed the potential yield concerning various aspects of the design space, such as critical dimensions, overlap, line end variance, 3D image issues, and open contacts [28].

8.1. Real-World Implementation of Advanced OPC Techniques

In this section, we specifically concentrate on reviewing the real-world implementation of advanced optical proximity correction (OPC) in the context of addressing real-world problems encountered during lithographic process development and production. Finally, we undertake a general discussion of the technical, operational, and strategic issues that must be considered if one is to extend the OPC tooling to solve broader types of computational lithography problems. We note an intriguing direction for future OPC extensions: the use of OPC to work not on digital mask layout data or off-axis printed contours, but as a tool for broader patterning layout objectives that could leverage layout-based process simulation, masks, and lithography. The results show the level of interest and potential impact that this direction might someday offer.

In the early days of being able to implement truly advanced optical proximity correction (OPC) features, several initial implementations of these methods were fixed-phantom OPC tricks delivering superior rectangularity in long lines with little or no edge-placement error in the operations that were using those features. Several additional strategies for fixing the result and reducing rectangularity within different portions of a layout exploiting the two parallel rectangularity fixes above were developed and applied in practice. In various mini case studies from process lines around the world, the following mechanisms were determined to be particularly effective by the teams that used four- or five-rings alongside normal one- and two-rings on the glass side of the binary mask to perform the accounting for proximity effects traditional in OPC [29].

Figure 5

Illustration of the effect of OPC on the imaging quality

In this first mini-case study, the diagonal white line represents the photomask layout data. Sinusoidal intensity profiles less than a taxicab distance beyond the edge of the photomask layout data due to optical proximity effects are designed to print a square wave in the resist. The intensity profile in blue represents the 2D feature print produced when no OPC is used. The green intensity profile represents the desired print region for the photomask in the resist, while the black represents the reticle layout data. The 2D feature print yielded by advanced OPC systems such as the imaging system comes equipped with 2D OPC and illumination optimization shown in the more complete 2D-OPC process. Offset printing and strip imprinting can produce a high-fidelity resist image using pixels with constant values when edges are shifted, but in the standard continuous-tone OPC aspect, changing the bias angle shown between the two rectangles in the top row of the left image illustrated that rectilinear photomask layout is slightly better connected in the masked output. Still, there is also slightly more error, evident in darkening portions of the edges or showing invalidations where design rule-check constraints were violated as shown in the underlying line, respectively. Lines are significantly more error-prone to rectangularity breaks than local corners in long lines. Dimensions 1280 x 834 pixels aspect ratio 1.537 for 800 nm, about half the wavelength, but with an aspect ratio of approximately 16 pixels per feature. This testing was performed on a framework and then tested on a photolithographic simulator. The results were quite different. We shall also mention the use of advanced sources and masks in computational lithography, and an intriguing direction for future OPC extensions: using OPC to design lithography layouts leveraging simulation, masks, and lithography to aid with broader patterning objectives. Finally, we discuss the relevant technical, operational, and strategic issues [30].

Advanced OPC is not simply an enabling technology. It has become critical for the successful development and manufacturing of the next generation of lithography tools and processes. However, the current OPC technology has its limitations and is not expected to clear the way for the next tectonic shift in lithography. This requires continuous innovation and backing from emerging AI and computational edge analytics developments to come up with the answers to the growing challenges. Even greater integration of stakeholders is required for the co-design of important traded instruments in lithography in the future. The co-development of the mask, source, computational lithography, semiconductor fabrication, and packaging approaches appear in this future space inextricably coupled, with potential opportunities for considerably reducing time to market, making industry-wide optical proximity correction much more flexible, scalable, and adaptable [31].

Even though hard constraints are almost always affected by wafer variability, the real-world impact of edge placement error can only be mitigated by computationally solving the problem in a real-time fashion in a feedback zoom-in. Future adapted OPC modeling work can target several related sub-objectives, which discuss the flattened shot budgets of stencil masks and take the decreased litho speed into account. A crindle in improved mask-making or its secondary effects during CPSM calibration would allow us to address an emerging edge placement issue directly. Opportunities still exist in real-time correction design. Rapid optical proximity correction on the reticle arises from these masks’ low complexity, darkness, and manufacturability constraints. In other words, the problem has a finitely realizable, axiomatic solution on LUs. In terms of edge placement error, the greater impact of photon printing on an integrated product brings this angle into the real-time OPC scheme. We anticipate the emergence of new post-wavelength control agent APCM schemes that improve focus latitude, absorbing changes to the wavelength control agent/base or on-track temperature/pressure to nearly zero control bandwidth. In the coming years, future research could investigate the relationships among OPC technology, hybrid mask writing/etch, and scanner correction, as well as analyze the opportunities of novel OPC and LFD techniques even further [32].

Figure 6

A sparse matrix model-based optical proximity correction algorithm with model-based mapping

9.1. Potential Innovations in OPC

Advanced Machine Learning Techniques Contemporary OPC practices focus on edge-oriented models. To go beyond the limitations of traditional edge-placement-based methods, it is imperative to come up with novel pattern fidelity metrics, possibly by capitalizing on state-of-the-art machine learning algorithms. Novel algorithms for chisel correction at the interfaces and sub-chip structural integrity can provide competitive alternatives to the classical full-chip OPC techniques. The need for OPC techniques that can be corrected in real systems and can provide reliable feedback on the patterning simulation is time-critical nowadays. Innovative lithography flows require new proximity correction methodologies. New organic resist materials contribute to new chemical and physical modeling frameworks of lithography which, in turn, require innovative OPC approaches. These future points are interdisciplinary and touch both lithography and electronic design domains, hence will foster cross-collaboration between the communities [33].

More generally, for the future, this document hints at investigating the impact of fast-evolving semiconductor design rules on OPC. The patterns are becoming more irregular and variable. Even the notion of edge placement changes: the actual formation of the edge in the mask is increasingly affected by the shot count and the beam-deflection system in the multi-beam writers, hence some of the errors in OPC may not propagate to the mask. Hence, one arguably wants to directly optimize mask images in a so-called mask decomposition step that is made possible by integer programming techniques. Overall, a fair amount of academic-industry research is needed to explore the fabric-prototype-assist full-chip OPC of tomorrow. In particular, the new metrics must be at least partially based on experimental wafer results. A deeper understanding of the evolution of material science is also needed, striking partnerships with material manufacturers. The proposed OPC techniques will be only effective if there are compatible working assumptions across the community, and these must be set in conjunction with the design and mask inspection tool makers. Preliminary developments highlight possible research challenges [34].

In this paper, we have analyzed the role and significance of optical proximity correction (OPC) with the changing complexities that semiconductor industries are facing. Our discussions have been directed towards the need for advanced OPC techniques that focus especially on improvements in pattern fidelity and reduction in placement errors. We have found that in conventional OPC methods, these two issues could not be addressed effectively, and so the aim to bridge this inadequacy has not just been the goal of this review essay but has also been reiterated in the work of various others that reflect a growing concern in the industry [35].

This necessitates the exploration of a range of other technologies such as direct-write e-beam lithography, next-generation multiple patterning schemes, and printing beyond 193 nm to facilitate high-volume semiconductor manufacturing with comparatively larger process latitudes. Thus, advanced OPC with in-chip variation (ICV) correction has been seen to offer significant advantages. In that sense, this essay focuses on traditional OPC techniques rather than any advanced versions, as so far, none of the latest applications of machine learning, AI, or any other emerging applicable technology have been extensively applied in leading-edge OPC work that could offer concrete proof of their contribution to this field. Nevertheless, it gives a comprehensive look at the advancements in current OPC methodologies that have shown promise, especially through a few real-life case studies.

To conclude, as we look ahead, neither the reduced lithographic budgets of the design technology co-optimization (DTCO) nor the advanced process development should delimit the cross-disciplinary research and explorations, and the continual advances in the industry in the path of OPC. It would require considerable rigor and further R&D to explore and align the numerous computational lithography techniques. Therefore, further research on this line should be welcome. To that end, this review essay could serve as a reference guide to help bond together the latest studies and industry practices in object-aware OPC methods for the generation of mask shapes. Moreover, the service of a collection of real-life case studies in a variety of technology nodes leveraging newly developed OPC techniques shall serve as food for thought for intellects grappling with the impact and advantages expected through the pioneering of one or more of these methods [36].

Equation 3: Optical Proximity Correction (OPC) Cost Function

where:

$C$ = Total cost function

$w_i$ = Weighting factor for each control point $i$

$I_i$ = Simulated image intensity at control point $i$

$I_{\text{target},i}$ = Desired intensity for each control point $i$

$\lambda$ = Regularization parameter

$M_j$ = Modified mask pattern at location $j$

$M_{\text{orig},}{}_j$ = Original mask pattern at location $j$

10.1. Key Findings and Implications for the Industry

In this work, we have analyzed strategies for the development of novel optical proximity correction techniques aiming at achieving the next level of pattern fidelity with a special emphasis on their impact on edge placement error. Neural network-based strategies are the most promising alternatives for computational lithography, showing consistent improvements in all key performance indicators concerning all reviewed fine-tuned techniques. Neural network OPC can increase the yield of a 7-nm technology node SRAM design by a factor of 2 compared to conventional rule-based OPC. Particularly, machine learning and artificial intelligence approaches can stretch the pattern fidelity by leveraging precise modeling of 3D mask topography effects, optical resist physics, and underlying on-wafer performance. Our results suggest that they are expected to be a true game changer for the semiconductor industry, surpassing the current state-of-the-art optimization [37].

Implementing machine learning and artificial intelligence approaches in OPC is expected to constantly push the manufacturing overhead by improving the yield, reducing stochastic errors, and enhancing overall critical dimension uniformity at reduced computational lithography cycle time. The thrust of industrial research in this domain should thus continue in a direction that enables the advancement of neural network-based techniques and expands their use to the innovation of downstream design rule enforcement solutions and lithography process window exploration tools. Moreover, we believe that it is time to publish layout-level results and undergo industry-wide detailed R&D to improve neural network-based OPC reliability systematically since it requires distinct execution from an industrial standard process with rule-based OPC. It is also important to address the education and training of nano industry professionals in these advanced topics extensively, as the proposals will unfold to others in advanced manufacturing skills via cyclic learning [38].